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m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 1 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 applications ? 1.0625 and 2.125 gbps fibre channel ? 1.25 gbps ethernet ? 1.25 gbps sdh/sonet the M02040-15 is an integrated high-gain limiting amplifier. featuring pecl outputs, the M02040-15 is useable in applications to 2.125 gbps. full output swing is achieved even at minimum input sensitivity. the M02040-15 can operate with a 3.3v or 5v supply. dc_servo supports applications requiring instantaneous output response. the M02040-15 also includes two analog rssi outputs propor tional to either the average or peak to peak input sig- nal and a programmable signal-level detector allowing the user to set thresholds at which the logic outputs are enabled. other available solutions: m02050-15 3.3/5v limiting amplifier for applications to 2.5 gbps (pecl outputs) m02049-15 3.3/5v limiting amplifier for applications to 4.3 gbps (cml outputs) m02043-15 3.3/5v limiting amplifier for applications to 4.3 gbps (cml outputs) 1.25 gbps and 4.25 gbps sfp reference designs are available from your macom representative. typical applications diagram t i a photodiode +3.3 v optional limiting amplifier comparator level shift rssi pp dinn rxavg in rssi avg dinp pecln peclp offset cancel output buffer threshold setting circuit regulator v cc st set v cc3 i ref jam los ac-coupled to tia r st dc_servo v tt level detect ac or dc coupled (as described in applications information) clock data recovery unit 12.1 k r ext mon m02016 dc_servo control biasing features ? operates with a 3.3v or 5v supply ? 2 mv typical input se nsitivity at 1.25 gbps ? pecl outputs ? average receive power monitor output (rssi avg ) ? peak-to-peak receive pow er monitor output (rssi pp ) ? on-chip dc offset cancellation circuit ? offset cancellation circui t can be disabled for burst mode applications ? low power (170 mw at 3.3v) ? output jam function ? 16-pin 3x3 mm qfn package
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 2 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 ordering information part number package operating temperature M02040-15 M02040-15 in qfn16 package ?40 c to 85 c M02040-15evm evaluation board with M02040-15 ?40 c to 85 c revision history revision level date description v4 release may 2015 updated logos and page layout. no content changes. h (v3) release december 2005 clarify comments on the use of the dc_servo pin in the applications information. g (v2) release august 2005 correct jam connection in block diagram and typical applications figures. correct i ref figure (reference current generation). f (v1) release june 2005 in the dc specifications, update r in diff and rssiavg; added note 1; moved rssiavg from ac specifications. in the ac specifications update v in(min) , v los , dj and tr/tf; add specifications for los assert and deassert. updated r st values and the typical los curve ( figure 4-3 - figure 4-5 ). added typical hysteresis curve ( figure 4-6 ). e preliminary march 2005 update the dc specification v oh . update the ac specifications v in(min) , v n , t los_on , and t los_off . corrected the evm ordering number. d preliminary december 2004 update the dc specifications r in diff and v ih . update r st values, update rssi information. remove peaking circuit applications information as this is not necessary for the -15 revision.
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 3 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 typical eye diagram 10 mv pp differential input 1.25 gbps 160 mv/div 140 ps/div pin configuration gnd pecln v cc i ref jam los rssi pp d in n gnd d in p peclp 1 4 5 9 12 13 16 8 st set v cc3 rxavg in rssi avg center pad connect to gnd dc_servo
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 4 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 1.0 product specification 1.1 absolute maximum ratings these are the absolute maximum ratings at or beyond which the ic can be expected to fail or be damaged. reli - able operation at these extremes for any length of time is not implied. note: the package bottom should be adequately grounded to ensure correct thermal performance, and it is recommended that vias are inserted through to a lower ground plane. table 1-1. absolute maximum ratings symbol parameter rating units v cc power supply voltage (v cc -gnd) -0.5 to +5.75 v t stg storage temperature -65 to +150 c peclp, pecln pecl output pins voltage v cc - 2 to v cc + 0.4 v i(peclp), i(pecln) pecl output pins maximum continuous current (delivered to load) 30 ma |dinp - dinn| data input pins differential voltage 0.80 v dinp, dinn data input pins voltage meet ing |dinp - dinn| requirement gnd to v cc3 + 0.4 v st set signal detect threshold setting pin voltage gnd to v cc3 + 0.4 v jam output enable pin voltage gnd to v cc + 0.4 v los status output pins voltage gnd to v cc + 0.4 v dc_servo dc_servo disable input pin voltage gnd to v cc + 0.4 v i ref current into reference input +0 to -120 a i(rssi avg ) current into rssiavg input +0 to -3 ma rssi pp rssi pp pin voltage gnd to v cc3 + 0.4 v i(los) current into loss of signal pin +3000 to -100 a
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 5 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 1.2 recommended operating conditions 1.3 dc characteristics v cc = +3.3v 7.5% or +5v 7.5%, t a = -40c to +85c, unless otherwise noted. typical specifications are for v cc = 3.3v, t a = 25c, unless otherwise noted. table 1-2. recommended operating conditions parameter rating units power supply: (v cc -gnd) (apply no potential to v cc3 ) or (v cc3 -gnd) (connect v cc to same potential as v cc3 ) +5v 7.5% or +3.3v 7.5% v junction temperature -40 to +110 c operating ambient -40 to +85 c table 1-3. dc characteristics symbol parameter conditions min typ max units i cc supply current outputs terminated into 50 to v cc (includes pecl load) ? 5261ma v outlpecl pecl output low voltage (1) (peclp, pecln) single ended; 50 load to v cc -2v v cc -1.81 v cc -1.71 v cc -1.62 v v outhpecl pecl output high voltage (1) (peclp, pecln) single ended; 50 load to v cc -2v v cc -1.025 v cc -0.952 v cc -0.88 v r in diff differential input resistance measured between dinp and dinn 90 110 130 v oh_cmos los output high voltage external 4.7-10 k pull up to v cc 2.75 v cc ?v v ol_cmos los output low voltage external 4.7-10 k pull up to v cc 0?0.4v v ih logic input high voltage jam, dc_servo 2.7 ? v cc v v il logic input low voltage jam, dc_servo ??0.8v rssiavg average received signal strength indicator range 15% accuracy 5 ? 2000 a notes: 1. limits apply between 0c to +85c. below 0 c the minimum decreases by up to 40 mv.
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 6 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 1.4 ac characteristics v cc = +3.3v 7.5% or +5v 7.5%, t a = -40c to +85c, input bit rate = 1.25 gbps 2 23 -1 prbs unless otherwise noted. typical specifications are for v cc = 3.3v, t a = 25c, unless otherwise noted. table 1-4. ac characteristics symbol parameter conditions min typ max units v in(min) differential input sensitivity 1.25 gbps, ber < 10 -12 ? 2 2.75 mv 2.125 gbps, ber < 10 -12 ?3.55mv v i(max) input overload ber < 10 -12 , differential input 1.25 gbps 1200 ? ? mv ber < 10 -12 , single-ended input, 1.25 gbps 600 ? ? mv v n rms input referred noise ? 140 ? v rms rssipp peak-to-peak received signal strength indicator range 4?100mv bw lf small-signal ?3db low frequency cutoff excluding ac couplin g capacitors ? 25 ? khz dj deterministic jitter (includes dcd) k28.5 pattern at 1.25 gbps, 10 mv pp input ? 14 60 ps rj random jitter 10 mv pp input ? 5 ps rms t r / t f data output rise and fall times 20% to 80%; outputs terminated into 50 ; 10 mv pp input ?145180ps v los los programmable range differential inputs 5 ? 55 mv hys signal detect hysteresis electrical; across los programmable range 2 3.5 5.5 db assert low low input los assert threshold r st = 7.50 k , differential input 3.5 4.9 ? mv pp deassert low low input los de-assert threshold r st = 7.50 k , differential input ? 7.8 11.3 mv pp assert med medium input los assert threshold r st = 6.81 k , differential input 8.4 11.7 ? mv pp deassert med medium input los de-assert threshold r st = 6.81 k , differential input ? 17.0 24.6 mv pp assert hi high input los assert threshold r st = 6.19 k , differential input 16.6 23.2 ? mv pp deassert hi high input los de-assert threshold r st = 6.19 k , differential input ? 33.4 48.4 mv pp t los_on time from los state until los output is asserted (1) los assert time after 1 v pp input signal is turned off; signal detect level set to 10 mv 2.3 ? 80 s t los_off time from non-los state until los is deasserted (2) los deassert time after in put crosses signal detect level; signal detect set to 10 mv with applied input signal of 20 mv pp 2.3 ? 80 s notes: 1. with v in_diff = 1 v pp , typical times decrease as v in_diff decreases. 2. with v in_diff = 20 mvpp, typical times decrease as v in_diff increases.
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 7 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 figure 1-1. data input requirements note: for single-ended input connections. when connecting to the used input with ac-coupling, the unused input should be ac-coupled through 50 to the supply voltage of the tia; when connecting to the used input with dc-coupling, the unused input should be dc-coupled through 50 to a voltage equal to the common mode level of the used input. dinp dinn 2 - 600 mv 4 - 1200 mv differential input single-ended input dinp or dinn 4 - 600 mv unused input
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 8 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 1.5 typical eye diagrams figure 1-2. m02040 1.25 gbps 10 mv pp differential input 1.25 gbps 160 mv/div 140 ps/div figure 1-3. m02040 2.125 gbps 10 mv pp differential input 2.125 gbps 160 mv/div 80 ps/div
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 9 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 2.0 pin definitions table 2-1. pin descriptions qfn pin# name function 1 gnd ground. 2v cc power supply. connect to either +5v or +3.3v. 3 pecln inverting data output (pecl). 4 peclp non-inverting data output (pecl). 5i ref internal los reference current. must be connected to ground through a 12.1 k 1% resistor. 6st set loss of signal threshold setting input. connect a 1% resistor between this pin and v cc3 to set loss of signal threshold. 7v cc3 power supply input for 3.3v applications or the output of the internally regulated 3.3v voltage when v cc = 5v. connect directly to supply for 3.3v applications (internal regul ator not in use). do not connect to power supply if v cc = 5v. 8dc_servo dc servo disable. when high, the dc servo circuit is disabled, allowing the limiting amplifier to be used with data that has changes quickly in amplitude and phase. also useful for data containing significant low-speed or dc signals. when low or floating, dc servo is enabled. internal 80 k resistor to ground. drive with a current limited source as described in section 4.1.4 . 9 dinp non-inverting data input. internally terminated with 50 to v tt (see figure 3-2 ). 10 dinn inverting data input. internally terminated with 50 to v tt (see figure 3-2 ). 11 gnd ground. 12 rxavg in average power monitor input. connect to monitor output of tias that produce a current (sink) mirror replica of the photodiode current. leave floating if not used. 13 jam output disable. when high, data outputs are disabled (with non-inverting output held high and inverting output held low). connect to los output to disable outputs with loss of signal. outputs are enabled when jam is low or floating. internal 150 k resistor to ground. 14 los loss of signal output. goes high when input signal falls below threshold set by st set . open collector ttl with internal 80 k pull-up resistor to v cc . 15 rssi avg receiver average input power monitor. provides a current source mirror of the current at rxavg in . connect a resistor to ground to set the full scale voltage to the desired level at maximum average input power. 16 rssi pp receiver peak-to-peak input voltage monitor. provides a dc voltage (ground referenced) proportional to the peak-to-peak input voltage swing. 17 center pad ground to pcb for thermal dissipation.
figure 2-1. M02040-15 pinout gnd pecln v cc i ref jam los rssi pp d in n gnd d in p peclp 1 4 5 9 12 13 16 8 st set v cc3 rxavg in rssi avg center pad connect to gnd dc_servo M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 10 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 11 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.0 functional description 3.1 overview the M02040-15 is a high-gain limiting amplifier for applications up to 2.125 gbps and incorporates a limiting ampli - fier, an input signal level detection circuit and also a fu lly integrated dc-offset cancellation loop that does not require any external components. the M02040-15 features pecl data outputs. the M02040-15 pr ovides the user with the flexibilit y to set the signal detect threshol d. optional outp ut buffer dis - able (squelch/jam) can be implemented using the jam input. figure 3-1. M02040-15 block diagram level detect limiting amplifier comparator level shift rssi pp los dinn rxavg in rssi avg dinp pecln peclp offset cancel output buffer threshold setting circuit regulator v cc st set v cc3 biasing i ref jam dc_servo v tt
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 12 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.2 features ? operates with a 3.3v or 5v supply ? 2 mv typical input sensitivity at 1.25 gbps ? pecl outputs ? average receive power monitor output (rssi avg ) ? peak-to-peak receive power monitor output (rssi pp ) ? on-chip dc offset cancellation circuit ? offset cancellation circuit can be disabled for burst mode applications ? low power (170 mw at 3.3v) ? output jam function ? 16-pin 3x3 mm qfn package 3.3 general description the M02040-15 is an integrated high-gain limiting amplifier. featuring pecl outputs, the M02040-15 is useable in applications to 2.125 gbps. full output swing is achieved even at minimum input sensitivity. the M02040-15 can operate with a 3.3v or 5v supply. dc_servo supports applications requiring instantaneous output response. the M02040-15 also includes two analog rssi outputs proportional to either the average or peak to peak input sig - nal and a programmable signal-level detector allowing the user to set thresholds at which the logic outputs are enabled.
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 13 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.1 inputs the data inputs are internally connected to v tt via 50 resistors, and generally need to be ac coupled. referring to figure 3-2 , the nominal v tt voltage is 2.85v because of the internal resistor divider to v cc3 , which means this is the dc potential on the data inputs. see the applications information section for further details on choosing the ac- coupling capacitor. 3.3.2 dc offset compensation the M02040-15 contain an internal dc autozero circuit that can remove the effect of dc offsets without using external components. this circuit is configured such th at the feedback is effective only at frequencies well below the lowest frequency of interest. the low frequency cut off is typically 25 khz. figure 3-2. cml data inputs v cc3 50 dinp v tt 50 dinn 8.3 k 1.3 k v cc v cc
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 14 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.3 data outputs the M02040-15 features 100k/300k pecl compliant outputs as shown in figure 3-3 . the outputs may be termi - nated using any standard ac or dc-coupling pecl termination technique. ac-coupling is used in applications where the average dc content of the data is zero. the advantage of this approach is lower power consumption, no susceptibility to dc drive and comp atibility with non-pecl interfaces. figure 3-3. pecl data outputs v cc v cc - 2v 50 50 peclp pecln
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 15 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.4 loss of signal (los) the M02040-15 features input signal level detection over an extended range. using an external resistor, r st , between pin st set and v cc3 ( figure 3-5 ) the user can program the input signal threshold. the signal detect status is indicated on the los output pin shown in figure 3-4 . the los signal is active when the signal is below the threshold value. the signal detection circuitry has the equivalent of 3.5 db (typical) electrical hysteresis. r st establishes a threshold voltage at the st set pin as shown in figure 3-5 . internally, the input signal level is monitored by the level detector (which also outputs the rssi pp voltage). as described in the rssi pp section, this voltage is proportional to the input signal peak to peak value. the voltage at st set is internally compared to the signal level from the level detector. when the level detect voltage is less than v (stset) , los is asserted and will stay asserted until the input signal level increases by a predefined amount of hysteresis. when the input level increases by more than this hysteresis above v (stset) , los is deasserted. see the applications information sec - tion for the selection of r st . note that st set can be left open if the loss of signal detector function is not required. in this case los would be low. figure 3-4. los output los v cc 80 k
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 16 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.5 peak to peak received sign al strength indicator (rssi pp ) the rssi pp output voltage is logarithmically proportional to the peak to peak level of the input signal. it is not nec - essary to connect an external capacitor to this output. internally, the rssi voltage is compared with a user select - able reference to determine loss of signal as described in the previous section. figure 3-5. st set input figure 3-6. rssi pp output v cc3 st set r st v stset v cc rssi pp v cc3 i(rssi pp ) 4 k v cc
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 17 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 figure 3-7. typical rssi pp transfer function differential input level (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 250 275 0 25 50 75 100 125 150 175 200
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 18 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 figure 3-8. typical rssi pp transfer function (low input level range) differential input l evel (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 0 5 10 15 20 25 30 35 40 45 50
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 19 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.6 jam function when asserted, the active high power down (jam) pin forces the outputs to a logic ?one? state. this ensures that no data is propagated through the system. the loss of signal detection circuit can be used to automatically force the data outputs to a high state when the input signal fa lls below the threshold. the function is normally used to allow data to propagate only when the signal is above the user's bit-error-rate requirement. it therefore inhibits the data outputs toggling due to noise when there is no signal present (?squelch?). in order to implement this function, los should be connected to the jam pin shown in figure 3-10 , thus forcing the data outputs to a logic ?one? state when the signal falls below the threshold. 3.3.7 dc servo function when the dc_servo pin (shown in figure 3-10 ) is driven high, the M02040-15 internal dc servo loop (described in section 3.3.2 ) is disabled and the part will pass dc signals. this is useful when using signals with an unequal mark and space ratio, when the signal contains significant lo w speed or dc information, or when the input to the part must be dc coupled to a tia that will change its common mode output voltage very quickl y. note that when the servo loop is disabled, any offset from the tia or within t he M02040-15 will cause dcd at the output which is a function of the offset and the input pp amplitude (large offsets and low amplitude input signals create the largest output dcd). when this pin is tied low or floating the 2040-15 servo loop operates as described in section 3.3.2 . figure 3-9. typical rssi pp transfer function (log scale) differential input level (mv pp ) v(rssi pp ) (mv) 0 25 50 75 100 125 150 175 200 225 250 275 110100
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 20 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 3.3.8 average received signal strength indicator (rssi avg ) the rssi avg output current is a mirrored version of the rxavg in current from compatible tias. it sources rather than sinks the current making it compatible with ddmi type interfaces. 3.3.9 voltage regulation the M02040-15 contains an on-chip voltage regulator to allow both 5v and 3.3v operation. when used at 5v, the on-chip regulator is enabled and the digital inputs and outputs are compatible with ttl 5v logic levels. figure 3-10. jam and dc_servo input figure 3-11. rssi avg output v cc r 1 = 55 k for jam, 30 k for dc_servo r 2 = 100 k for jam, 50 k for dc_servo r 1 r 2 jam and dc_servo v cc3 rssi avg rxavg in (from tia) r ext v cc v cc
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 21 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 4.0 applications information 4.1 applications ? 1.0625 and 2.125 gbps fibre channel ? 1.25 gbps ethernet ? 1.25 gbps sdh/sonet figure 4-1. typical applications circuit t i a photodiode +3.3 v optional limiting amplifier comparator level shift rssi pp dinn rxavg in rssi avg dinp pecln peclp offset cancel output buffer threshold setting circuit regulator v cc st set v cc3 i ref jam los ac-coupled to tia r st dc_servo v tt level detect ac or dc coupled (as described in applications information) clock data recovery unit 12.1 k r ext mon m02016 dc_servo control biasing
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 22 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 4.1.1 reference cu rrent generation the M02040-15 contain an accurate on-chip bias circuit that requires an external 12.1 k 1% resistor, r ref , from pin i ref to ground to set the los threshold voltage at st set precisely. 4.1.2 connecting v cc and v cc3 for 5v operation, the v cc pin is connected to an appropriate 5v 7.5% supply. no potential should be applied to the v cc3 pin. the only connection to v cc3 should be r st as shown in figure 3-5 . when v cc = 5v all logic outputs and the da ta outputs are 5v compatible while the cml data inputs are still refer - enced to 3.3v from the internal regulator (see figure 3-2 ). for low power operation, v cc and v cc3 should be con - nected to an appropriate 3.3v 7.5% supply. in this case all i/os are 3.3v compatible. 4.1.3 choosing an input ac-coupling capacitor when ac-coupling the input the coupling capacitor should be of sufficient value to pass the lowest frequencies of interest, bearing in mind the number of consecutive identical bits, and the input resistance of the part. for ethernet or fibre channel data, a good rule of thumb is to chose a coupling capacitor that has a cut-off frequency less than 1/(1,000) of the input data rate. for example, for 1.25 gbps data, the coupling capacitor should be chosen as: figure 4-2. reference current connection los v set v lvl_det bg_ref v cc3 r st r ref st set i ref
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 23 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 f cutoff (1.25x10 9 / 1x10 3 ) = 1.25x10 6 the -3 db cutoff frequency of the low pass filter at the 50 input is found as: f 3db = 1/ (2 * * 50 * c ac ) so solving for c where f 3db = f cutoff c ac = 1/ (2 * * 50 * f cutoff )eq.1 and in this case the minimum capacitor is 2.5 nf. for 2.125 gbps fibre channel, this results in a minimum capacitor of 1.5 nf. 4.1.3.1 multirate applicat ions down to 155 mbps in this case, the input coupling capacitor needs to be large enough to pass 15 khz (155x10 6 /10,000) which results in a capacitor value of 0.2 f. however, because this low pass frequency is close to the 25 khz low pass frequency of the internal dc servo loop, it is preferable to use a larger input coupling capacitor such as 1 f which provides an input cutoff frequency of 3.1 khz. this separates the two poles sufficiently to allow them to be considered inde - pendent. this capacitor should also have a 10 nf capacitor in parallel to pass the higher frequency data (in the multirate application) without distortion. in all cases, a high quality coupling capacitor should be used as to pass the high frequency content of the input data stream. 4.1.4 using dc_servo when the dc_servo pin (shown in figure 3-10 ) is tied high, the M02040-15 disables the internal servo loop which allows the device to pass signals with dc content resulting in instantaneous response to changes in the input data stream (e.g. data amplitude and phase). however, there is no correction for limit amp offset when the servo loop is disabled which results in degraded sensit ivity and increased duty cycle distortion. because of the nature of the esd structure on this pin, if it is driven by a device with i ol or i oh > 2 ma then a 1 k to 10 k resistor should be used in series with the dc_servo pin. if the internal servo loop is never going to be dis - abled, dc_servo should be should be connected to ground using a 1k to 10k resistor. if the internal servo loop is going to be continuously disabled, the dc_servo pin should be connected to v cc using a 1 k to 10 k resistor. 4.1.5 using rssi avg as shown in the typical applications circuit (front page), when interfacing to a tia that features a ?mon? output such as the m02010 or m02016, the M02040-15 can reference the current sunk into the tia ?mon? output and pro - duce a proportional current at the 2040 rssi avg output. the current is sourced into resistor r ext to ground creat - ing a voltage suitable for ddmi applications. r ext should be chosen as: r ext = 1/(maximum current into rssi avg )eq.2 this keeps the voltage at rssi avg between 0 and 1 v.
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 24 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 4.1.6 setting the si gnal detect level using figure 4-3 , the value for r st is chosen to set the los threshold at the desired value. the resulting hystere - sis is also shown in figure 4-3 . from figure 4-3 , it is apparent that small variations in r st cause significant variation in the los threshold level, particularly for low input signal levels. this is because of the logarithmic relationship between the rssi voltage and the input signal level. it is recommended that a 1% resistor be used for r st and that allowance is provided for los variation, particularly when the los threshold is near the sensitivity limit of the M02040-15. example r st resistor values are given in ta bl e 4-1 . table 4-1. typical los assert and de-assert levels for various 1% r st resistor values r st (k ) vin (mv pp) differential los assert los de-assert 7.50 4.9 7.8 6.81 11.7 17.0 6.19 23.2 33.4 5.49 55.0 77.3 figure 4-3. typical loss of signal ch aracteristic (full input signal range) r st (k ) 0 10 20 30 40 50 60 70 80 5.5 5.7 5.9 6.1 6.3 6.5 6.7 6.9 7.1 7.3 7.5 threshold level (mv pp ) optical hysteresis de-assert assert = 10*log 10 (de-assert/assert) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 25 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 figure 4-4. typical loss of signal ch aracteristic (low input signal range) r st (k ) 0 10 20 30 6.5 6.7 6.9 7.1 7.3 7.5 threshold level (mv pp ) de-assert assert = 10*log 10 (de-assert/assert) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c optical hysteresis
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 26 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 figure 4-5. typical loss of signal ch aracteristic (high input signal range) threshold level (mv pp ) r st (k ) 0 10 20 30 40 50 60 70 80 5.5 5.7 5.9 6.1 6.3 6.5 optical hysteresis = 10*log 10 (de-assert/assert) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c assert de-assert
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 27 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 4.1.7 peclp and pecln termination the outputs of the M02040-15 are pecl compatible and any standard ac or dc-coupling termination technique can be used. figure 4-7 and figure 4-8 illustrate typical ac and dc terminations. ac-coupling is used in applications where the average dc content of the data is zero e.g. sonet. the advantage of this approach is lower power consumption, no susceptibility to dc drift and compatibilit y with non-pecl inter - faces. figure 4-7 shows the circuit configuration and ta b l e 4-2 lists the resistor values. if using transmission lines other than 50 , the shunt terminating resistance z t should equal twice the impedan ce of the transmission line (z o ). dc-coupling can be used when driving pecl interfaces and has the advantage of a reduced component count. a thevenin termination is used at the receive end to give a 50 load and the correct dc bias. figure 4-8 shows the circuit configuration and ta b l e 4-2 the resistor values. alternatively, if available, terminating to v cc - 2v as shown in figure 4-9 has the advantage that the resistance value is the same for 3.3 v and 5 v operation and it also has performance advantages at high data rates. figure 4-6. typical loss of signal hysteresi s characteristic (full input signal range) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 5.7 5.9 6.1 6.3 6.5 6.7 6.9 7.1 7.3 7.5 e lectrical hysteresis (db) r st (k ) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c = 20*log 10 (de-assert/assert) electrical hysteresis
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 28 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 table 4-2. pecl termination resistor values supply output impedance r pull-down z t r ta / r tb r t / r b 5v 50 270 100 2.7 k / 7.8 k 82 / 130 3.3v 50 150 100 2.7 k / 4.3 k 130 / 82 figure 4-7. ac-coupled pecl termination figure 4-8. dc-coupled pecl termination v cc m02040 peclp z o z t r pull-down pecl 0.1f v cc r ta r tb 0.1f r tb r ta pecln z o v cc m02040 z o pecl v cc r t r b r b r t z o 10 nf peclp pecln
M02040-15 m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support 29 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 4.1.8 using jam as shown in the typical applications circuit ( figure 1-2 ), the los output pin can optionally be connected to the jam input pin. when los asserts the jam function sets the data outputs to a fixed ?one? state (peclp is held high and pecln is held low). this is normally us ed to allow data to propagate only when the signal is above the users' bit error rate (ber) requirement. it prevents the outputs from toggling due to noise when no signal is present. from the los assert and deassert figures above ( figure 4-2 - figure 4-4 ), when an input signal is below the los assert threshold, los asserts (los high) causing jam to assert. when jam asserts, the data outputs and the internal servo loop of the M02040-15 are disabled. if the input signal reaches or exceeds the los deassert threshold, los deasserts (los low) causing jam to deassert, and hence enables the data outputs and the internal servo loop. if, however, the input signal is slowly increasing to a level that does not exceed the los deassert threshold (operating in the hysteresis region), the internal servo loop may not be fully established and this may cause partial enabling of the data outputs. to avoid this the input signal needs to fully reach or exceed the los deassert level to fully enable the data outputs. figure 4-9. alternative pecl termination v cc z o pecl z o 10 nf v cc v cc - 2v 50 50 m02040 peclp pecln
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support M02040-15 30 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4 5.0 package specification figure 5-1. package information note: view is for a 12 pin package. all dimensions in the tables apply for the 16 pin package 16 4 4 1.50 1.65 1.65 1.50 1.35 1.35
m/a-com technology solutions inc. (macom) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. visit www.macom.com for additional data sheets and product information. for further information and support please visit: http://www.macom.com/support m/a-com technology solutions inc. all rights reserved. information in this document is provided in connect ion with m/a-com technology solutions inc ("macom") products. these materials are provided by macom as a service to its customers and may be used for informational purposes only. except as provided in macom ' s terms and conditions of sale for such products or in any separate agreement related to this document, macom assumes no liability whatsoever. macom assumes no responsibility for errors or omissi ons in these materials. macom may make changes to specifications and product descriptions at any time, without notice. ma com makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities ar ising from future changes to its specifications and product descriptions. no license, ex press or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. these materials are provided "as is" without warranty of any kind, either express or implied, relating to sale and/or use of macom products incl uding liability or warranties relating to fitness for a particul ar purpose, consequential or incidental damages, merchantability, or infringeme nt of any patent, copyright or other intellectual property right. macom further does not warrant the accuracy or completeness of the information, text, graph ics or other items contained within these materials. macom shall not be liable for any special, indirect, incidental, or consequential damages, including without li mitation, lost revenues or lost profits, which may result from the use of these materials. macom products are not intended for use in medical, lifes aving or life sustaining applications. macom customers using or selling macom products for use in such applications do so at their own risk and agree to fully indemnify macom for any damages resulting from such improper use or sale. M02040-15 31 3.3/5v limiting amplifier for applications to 2.125 gbps rev v4

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